Method of connecting a grid array package to a printed circuit board

ABSTRACT

The present invention relates to a compliant leaded interposer for resiliently attaching and electrically connecting a ball grid array package to a circuit board. The interposer may include a substrate, a plurality of pads, and a plurality of pins. The plurality of pads may be positioned substantially on the top surface of the substrate and arranged in a predetermined pattern substantially corresponding to the solder ball pattern on the ball grid array package. The plurality of pins may be positioned substantially perpendicular to the substrate and may extend through the substrate and the plurality of pads. The interposer may be configured to attach the ball grid array package to the circuit board such that each of the solder balls on the ball grid array package contacts at least a portion the plurality of pins and at least a portion of the plurality of pads and such that the each of the plurality of pins also connects to a contact on the circuit board.

This application is a divisional of U.S. patent application Ser. No.11/358,723, now U.S. Pat. No. 7,684,205, entitled “System and Method ofUsing a Compliant Lead Interposer,” filed Feb. 22, 2006.

FIELD OF THE INVENTION

The present invention is related to electromechanical leads connectingintegrated circuit packages to printed wire boards, and moreparticularly to a method of attaching a compliant leaded interposer to aplastic ball grid array in order to compensate for non-coplanarity orwarpage.

BACKGROUND OF THE INVENTION

Early attempts at mounting and connecting integrated circuits andsemiconductor chips to printed wiring boards (PWBs) frequently resultedin unreliable connections. More particularly, attempts at connectingcommercial-off-the-shelf (“COTS”) large-size, high-pin-count (“HPC”)plastic ball grid arrays (PBGAs) to PWBs included additionaldifficulties during attachment and use due certain characteristics tothe PBGAs. Some of the COTS PBGAs display warpage and non-coplanarity,which may cause shorting and/or structural weaknesses after soldering.These difficulties may be enhanced or exaggerated when the PWBs areexposed to harsh environments, such as environments having thermalcycling and mechanical vibrations.

Non-coplanarity in a PBGA is measured by the largest distance between agiven ball and a theoretical plane formed by three highest balls.Non-coplanarity may be observed by placing a PBGA on a flat plate orsurface where only three balls make contact with the flat plate. Thenon-coplanarity prevents other balls from contacting the surface,leaving a gap. Non-coplanarity may, however, change during thermalcycling, depending in some cases on the thermal coefficient of expansionmismatch of the materials used in the PBGA, such as silicon, substrate,encapsulant, and die adhesive and structural inconsistencies.

In some cases, the COTS PBGAs, “as received” from the manufacturer,include non-coplanarity characteristics even at room temperature. COTScomponents, despite following commercial standards, may displaydeviations of 0.004 inch for a small-size COTS PBGA, which for 0.020inch diameter solder balls indicates a 0.004/0.020 deviation or 20%non-coplanarity. For small-size COTS PBGA, this deviation, equalingapproximately ⅕th of the height of the joint, results in a weak jointbetween corresponding contacts on the PBGA and the PWB. For large-sizeCOTS PBGA, the problem may be exaggerated with the deviation fromcoplanarity exceeding 0.006 in some cases. The PGBAs may experienceadditional warpage during soldering when localized temperatures mayincrease dramatically. For example, the soldering temperature may rangefrom about 215° C. to about 220° C. for Tin63%:Lead37% solder and about245° C. to about 250° C. for lead-free Tin:Silver:Copper (SAC) alloy. Atthese soldering temperatures, previously planar PBGAs may experience newwarpage and originally warped PBGAs may further deform, exacerbating theissue.

FIG. 1A shows an example of a PBGA prior to soldering to a PWB. As shownin FIG. 1, a PBGA 10 may include an encapsulant 11, a substrate 12 andsolder balls 13. Although the PBGA 10 may be coplanar at roomtemperature when received from the manufacturer, the PBGA may warpduring soldering when localized temperatures increase. As shown in FIG.1A, for most COTS PBGA the encapsulant 11 does not extend across theentire upper surface of the substrate 12. As such, the substrate 12 hasbeen shown to experience localized warpage of the outer portions of thesubstrate 12 without the encapsulant 11 during soldering of the solderballs 13.

FIG. 1B shows the effects of warpage on the quality of the solderjoints. As shown, the PBGA 10 may warp during or after soldering,especially at the edges of the PBGA 10, with the substrate 12 departingfrom coplanarity. For example in FIG. 1B, at the edges of the PBGA 10, adistinctive downward curve is shown. This downward warpage may causeshorts in the electrical circuits if the solder balls 13 flatten andtouch one another as shown in FIG. 1 when the PBGA is soldered to thePWB 30. Alternatively, if the PBGA is warped with an upward curve (notshown in the figures), the solder ball may fail to make contact with thePWB, resulting in a gap or open circuit.

If a warped or non-coplanar PBGA is received from the manufacturer andsoldered to a PWB in the normal process, the warpage may be exaggeratedduring the soldering process and compound the problem. In COTS HPC PBGA,the warpage due to the soldering process may be difficult to predict dueto several variables associated with the materials and processes. Forexample, the PBGA typically warps at the usual 215° C. to 220° C.soldering temperature. However, even when cooling from about 183° C.,the temperature at which typical solder solidifies, to room temperature,the PBGA may continue to warp, inducing stress into the solder joints.Further, repeated thermal cycling, such as for example from −40° C. to+100° C., during actual use may induce additional warping in the PBGAand result in stressed solder joints due to repeated warping andunwarping actions.

Even if the induced warpage or non-coplanarity is not sufficient tocause a short or gap, a non-coplanar PBGA may induce greater stress andstrain on the solder joints used to attach the PBGAs to the PWBs.Typically, PBGAs and PWBs have different thermal coefficients ofexpansion (TCE), resulting in problems when exposed to harsh thermallycyclic environments and vibration. When warped or non-coplanar PBGAsexperience thermal expansion and contraction, the individual solderjoints the PBGA to the PWB often experience different amounts of stressand strain. Stresses induced by thermal cycling, vibration and shockduring use limit the life of the solder joint and the reliability of thesystem. Highly stressed, weak solder joints inherently include a lowerlife expectancy. Over time, degradation and cracking results at thesolder joints from temperature cycling, especially where localizedwarping of the PBGA has already induced stress on the solder joints. Asa result, the thermal expansion and contraction experienced by thesolder joints increases with the amount of warpage of the PBGA,resulting in possible mechanical and electrical failure over time.

Previous attempts to connect certain components to PWBs have includedthe use of compliant leaded interposers. Such compliant leadedinterposers have included etched leads, formed from thin copper leaf,which directly connect the electrical contacts on lightweightcomponents, such as chip scale packages, to the electrical contacts onthe PWB. An example of such a compliant leaded interposer is taught inU.S. Pat. No. 6,830,177. However, the thin etched leads of previouslytaught interposers are incapable of supporting larger components, suchare large area grid array components. More particularly, the previouslytaught interposers fail to provide sufficient mechanical support androbustness for heavy PBGA components used in may advance electronicpackages.

Therefore, it would be desirable to compensate for warpage ornon-coplanarity in PBGA and to provide a robust mechanical andelectrical connection between the PBGA and the PWB after soldering.

SUMMARY OF THE INVENTION

The present invention is related to a compliant leaded interposer forresiliently attaching and electrically connecting a ball grid arraypackage to a circuit board where the ball grid array package includessolder balls arranged in a solder ball pattern. The compliant leadedinterposer may include a substrate having a top surface and a bottomsurface and a plurality of pads positioned substantially on the topsurface of the substrate and arranged in a predetermined patternsubstantially corresponding to the solder ball pattern with each of theplurality of pads being associated with one of the solder balls. Theinterposer may also include a plurality of pins positioned substantiallyperpendicular to the top surface of the substrate and extending throughthe substrate and the plurality of pads. The plurality of pins may bearranged in the predetermined pattern with each of the plurality of pinsbeing associated with one of the solder balls and each of the pluralityof pins may include a first end configured to extend a first distancebeyond the top surface of the substrate and a second end configured toextend a second distance beyond the bottom surface of the substrate. Theinterposer may be configured to attach the ball grid array package tothe circuit board such that each of the solder balls contacts at least aportion the first end of one of the plurality of pins and at least aportion of one of the plurality of pads and such that the second end ofeach of the plurality of pins attaches to an associated contact on thecircuit board.

In another embodiment of the present invention, a method of connecting agrid array package to a printed wiring board (PWB) includes the steps ofaligning a compliant leaded interposer in an assembly tool. Theinterposer may include a plurality of pins positioned substantiallyperpendicular to a substrate and extending through the substrate. Eachof the plurality of pins may include a first end configured to extend afirst distance beyond a top surface of the substrate and a second endconfigured to extend a second distance beyond a bottom surface of thesubstrate. Further, each of the plurality of pins may include a padaligned with the pin and positioned substantially on the top surface ofthe substrate. The assembly tool may include a plurality of holes in aplate member configured to receive the second end of the plurality ofpins in a predetermined pattern. The method may also include the stepsof orienting a plurality of solder balls on the grid array package withthe first end of the plurality of pins using tooling pins mounted on theplate member of the assembly tool and electrically connecting each ofthe plurality of solder balls to the first end of one of the pluralityof pins and to at least a portion of one of the plurality of pads. Themethod may then include removing the interposer and the ball grid arraypackage from the assembly tool and orienting the second end of each ofthe plurality of pins with at least one conductive contact on the PWB.Finally, the method may include electrically connecting the second endof each of the plurality of pins to at least one conductive contact ofthe PWB thereby establishing an electrical connection between the ballgrid array package and the PWB. The plurality of pins may define a spacebetween the PWB and the bottom surface of the substrate of theinterposer.

These and other objects and advantages of the invention will be apparentfrom the following description, the accompanying drawings and theappended claims.

BRIEF DESCRIPTION OF THE DRAWINGS

While the specification concludes with claims particularly pointing outand distinctly claiming the present invention, it is believed the samewill be better understood from the following description taken inconjunction with the accompanying drawings, which illustrate, in anon-limiting fashion, the best mode presently contemplated for carryingout the present invention, and in which like reference numeralsdesignate like parts throughout the Figures, wherein:

FIG. 1A shows a side view of a plastic ball grid array prior tosoldering on a printed wiring board;

FIG. 1B shows a side view of a plastic ball grid array soldered on aprinted wiring board;

FIG. 2 shows a top view of the compliant leaded interposer in accordancewith one embodiment of the present invention;

FIGS. 3A shows a side view of the compliant leaded interposer shown inFIG. 2

FIG. 3B shows an enlarged side view of the a portion of the compliantleaded interposer shown in FIG. 3A;

FIG. 4A shows a top view of an assembly tool in accordance with anotherembodiment of the present invention;

FIG. 4B shows a side view of the assembly tool shown in FIG. 4A;

FIG. 5 shows the compliant leaded interposer of FIG. 2 positioned in theassembly tool of FIG. 4 with a ball grid array package positioned priorto soldering in accordance with one embodiment the present invention;

FIG. 6 shows the assembled compliant leaded interposer and the ball gridarray in accordance with the present invention; and

FIG. 7 shows the assembled compliant leaded interposer and the ball gridarray soldered to the printed wiring board in accordance with thepresent invention.

DETAILED DESCRIPTION OF THE INVENTION

The present disclosure will now be described more fully with referenceto the Figures in which various embodiments of the present invention areshown. The subject matter of this disclosure may, however, be embodiedin many different forms and should not be construed as being limited tothe embodiments set forth herein.

The present invention relates to a method and system for mountingplastic ball grid arrays (“PBGA”) to circuit boards or printed wiringboards and more particularly to using a compliant leaded interposer forcompensating for non-coplanarity or warpage of a PBGA.

FIG. 2 shows an interposer 100 in accordance with one embodiment of thepresent invention. As shown, the interposer 100 includes an interposersubstrate 110, copper pads 120, and compliant pins 130 (shown in FIG.3A). In accordance with the present invention, the substrate may beformed from a laminate material with or without fiber-glassreinforcement, which may be commercially obtained to match as closely aspossible the TCE of the PBGA and/or ceramic ball grid array (CBGA). Thesubstrate may also be formed from high temperature FR4 such as Nelco4000-13. Other material known to those of skill in the art may be usedincluding, but no limited to, Bismatemide Triazine (BT), Polyamide andCyanate Ester. The copper pads 120 and the compliant pins 130 may bearranged in the pattern shown in FIG. 2. As would be obvious to one ofskill in the art, the arrangement of the pads 120 and pins 130 may beconfigured to match that of the PBGA and the PWB.

Referring to FIG. 3A, a side view of the interposer 100 from FIG. 2 isshown. The compliant pins 130 are configured to extend through thesubstrate 110 and the pads 120, extending a predetermined amount abovethe surface of the substrate 110. In accordance with one embodiment ofthe present invention, the compliant pins 130 may be 0.012 inches indiameter and 0.088 inches in length. The pins 130 may be formed fromelectrically conductive materials known to those of skill in the artsuch as Be:Cu alloy, pure copper, phosphorus bronze, and Cu:Be alloys.The pins may also be surface finished with materials known to those ofskill in the art such as Ni:Au, Ni:Pd:Au, Sn:Pb, Ag and Sn, depending onthe application. Further, the pins may include a less than 20 microinchgold finish.

As shown in FIGS. 3A and 3B, the pads 120 are positioned on only oneside of the substrate 110. The copper pads may be formed from copperwith a liquid solder mask or other suitable materials known to those ofskill in the art. Further, in one embodiment, the pads 120 areconfigured at about a 0.025 inch diameter for each pad 120 if a pitch of0.050 inch is used for spacing on the PBGA. If a 0.040 inch pitch isused, a diameter of about 0.020 inch may be used for the diameter of thepads 120. It should be understood that alternative pitches and pad sizesmay be used without deviating from the scope and spirit of the presentinvention.

FIG. 3B shows a blown up view of a portion of the interposer 100. Asingle compliant pin 130 is shown extending a distance B above the uppersurface of the substrate 110, which includes a thickness A. The length Cof the pin defines the total height of the interposer 100. The distanceB may vary depending on the pitch used. For example, the distance B maybe about 0.010 inch for a pitch of 0.050 inch and about 0.008 inch for apitch of 0.040 inch. In accordance with one embodiment of the presentinvention, the thickness A of the substrate 110 may be about 0.010 inchand the length C of the pin may be about 0.070 inch to about 0.100 inch.It should be understood that other dimensions for the interposer may beused without deviating from the scope and spirit of the presentinvention.

Referring to FIG. 4A, top view of a soldering tool 400 is shown. Thesoldering tool 400 includes four tooling pins 410 mounted on analignment plate 420. In accordance with one embodiment of the presentinvention, the tooling pins 410 may be about 0.030 inch diameter.Further, the alignment plate 420 may include about 0.015 inch diameterholes 430, which are configured to match the pin pattern of theinterposer footprint. The alignment plate 420 may be formed from about0.060 inch aluminum plate or other suitable material known to one ofskill in the art. As shown in FIG. 4A, which shows a side view of theassembly tool, the tooling pins 410 may be configured to extend abovethe surface of the alignment plate 420.

FIG. 5 shows a cross-section view of the PBGA 200, the interposer 100,and the soldering tool 400 with the PBGA 200 being aligned on theinterposer 100 using the soldering tool 400. The PBGA 200 is shownpositioned between the tooling pins 410, allowing the PBGA 200 to beproperly aligned over the interposer such that the soldering balls 230are aligned with the compliant pins 130 of the interposer 100. The pins130 of the interposer 100 are shown aligned and inserted into the holes430 of the alignment plate 420 of the soldering tool 400. Once alignedand positioned as shown in FIG. 5, the soldering balls 230 of the PBGA200 may be soldered to the interposer 100 using soldering processes andtechniques known to those of skill in the art.

Although not visible in FIG. 5, it should be understood that the copperpads 120 of the interposer 100 are positioned on the top surface of theinterposer 100 and are intended to make contact with the soldering balls230 once soldering is complete. The solder balls 230 of the PBGA 200 maybe formed from Tin 63%:Lead 37% with a soldering temperature of 215° C.to 220° C. or lead-free Tin:Silver:Copper (SAC) alloy solder with asoldering temperature of 245° C. to 250° C. Alternatively, other soldersmay be used without deviating from the scope and spirit of the presentinvention.

The soldered assembly of the PBGA 200 and the interposer 100 is shown inFIG. 6 according to one embodiment of the present invention. It shouldbe understood that the portion of the compliant pin 130 extending abovethe surface of the substrate 110 the distance B extends into the solderjoint or solder ball 230, securely making a mechanical connection and anelectrical connection. This distance B serves to accommodate warping inthe PBGA and help form a joint between the interposer solder pad 120 andthe PBGA pad/contact. The distance B also serves to reinforcement of theconductive pin and the solder joint between the interposer and the PBGA.The distance B helps reduce the possibility of a gap or open circuitforming in the event the PBGA 200 warps upward away from the interposer100. By extending beyond the top surface of the substrate 110 of theinterposer 100, the compliant pin 130 increases the likelihood ofcontact with the solder ball 230 without reducing the distance betweenthe substrate 220 and the substrate 110. As shown in FIG. 6, theassembly is ready to be soldered to the PWB. The distance of the pinbelow the substrate (C−(A+−B)) may be intentionally kept long forcompliancy of the pin and to accommodate thermal cycling and TCEmismatch.

Referring to FIG. 7, the assembly of the PBGA 200 and the interposer 100is shown in a side view soldered to the PWB 300. The solder 310mechanically and electrically connects the pins 130 of the interposer100 to contacts on the PWB 300. The soldering of the interposer 100 tothe PWB 300 may be performed according to the typical soldering processknown to those of skill in the art. As would be apparent to one ofordinary skill in the art, the present invention may be configured to beused with various ball arrangements including full grid ballarrangements, perimeter ball arrangements, or other ball arrangements.

It should be understood that the compliant pins 130 are configured toprovide sufficient compliance between the PBGA 200 and the PWB 300during thermal cycling. The stresses and strains caused by the differentthermal expansions and contractions of the PBGA 200 and the PWB 300, dueto different TCEs, may be absorbed by the pins 130 of the interposer 100rather than the solder joints 230 and 310. As such, the compliantinterface between the PBGA 200 and the PWB 300 provides a robust andefficient mechanical and electrical connection that resists damage dueto thermal cycling and compensates for variations in the coplanarity ofthe PBGA.

It should be understood that the compliant interposer in accordance withthe present invention May be used with other grid ball array componentswithout deviating from the scope and spirit of the present invention.For example, the interposer 100 may be used with a CBGA using lead-freesolder balls such as tin:silver:copper (SAC). Since the ball grid array(BGA) are soldered twice, a step soldering process known to those ofskill in the art may use two different alloys of two different meltingtemperatures to effectively solder the BGA

The foregoing descriptions of specific embodiments of the presentinvention are presented for purposes of illustration and description.They are not intended to be exhaustive or to limit the invention to theprecise forms disclosed. Obviously, many modifications and variationsare possible in view of the above teachings. While the embodiments werechosen and described in order to best explain the principles of theinvention and its practical applications, thereby enabling othersskilled in the art to best utilize the invention, various embodimentswith various modifications as are suited to the particular use are alsopossible. The scope of the invention is to be defined only by the claimsappended hereto, and by their equivalents.

What is claimed is:
 1. A method of connecting a grid array package to aprinted wiring board (PWB), comprising the steps of: aligning acompliant leaded interposer in an assembly tool, the interposerincluding a plurality of pins positioned substantially perpendicular toa substrate and extending through the substrate, each of the pluralityof pins having a first end configured to extend a first distance beyonda top surface of the substrate and a second end configured to extend asecond distance beyond a bottom surface of the substrate, each of theplurality of pins further including a pad aligned with the pin andpositioned substantially on the top surface of the substrate; theassembly tool including a plurality of holes in a plate memberconfigured to receive the second end of the plurality of pins in apredetermined pattern; orienting a plurality of solder balls on the gridarray package with the first end of the plurality of pins using toolingpins mounted on the plate member of the assembly tool; electricallyconnecting each of the plurality of solder balls to the first end of oneof the plurality of pins and to at least a portion of one of theplurality of pads; removing the interposer and the ball grid arraypackage from the assembly tool; orienting the second end of each of theplurality of pins with at least one conductive contact on the PWB; andelectrically connecting the second end of each of the plurality of pinsto at least one conductive contact of the PWB thereby establishing anelectrical connection between the ball grid array package and the PWB,the plurality of pins defining a space between the PWB and the bottomsurface of the substrate of the interposer.
 2. The method according toclaim 1, wherein the ball grid array package is a plastic ball gridarray package.
 3. The method according to claim 1, wherein the ball gridarray package is a ceramic ball grid array package.
 4. The methodaccording to claim 1, wherein each of the plurality of pins of theinterposer includes a diameter of approximately 0.012 inch and a lengthof approximately 0.088 inch.
 5. The method according to claim 1, whereinthe pad includes a diameter of approximately 0.025 inch when a pitch ofapproximately 0.050 inch is used for the solder balls.
 6. The methodaccording to claim 1, wherein the pad includes a diameter ofapproximately 0.020 inch when a pitch of approximately 0.040 inch isused for the solder balls.
 7. The method according to claim 1, whereinthe first distance is approximately 0.010 when a pitch of approximately0.050 inch is used for the solder balls.
 8. The method according toclaim 1, wherein the first distance is approximately 0.008 when a pitchof approximately 0.040 inch is used for the solder balls.
 9. A method ofconnecting a ball grid array package to a printed wiring board (PWB),comprising the steps of: forming a compliant leaded interposer havingconductive leads, each of the leads having a body and a first end and asecond end, the leads extending through a substrate and a set ofconductive pads positioned substantially on a top surface of thesubstrate; providing an assembly tool having a plate member, a set oftooling pins mounted on the plate member, and a set of holes formed in aplate member; mounting the interposer in the assembly tool such theleads are received in the set of holes; aligning the ball grid arraypackage on the interposer using tooling pins such that a set of solderballs on the ball grid array package is substantially aligned with thefirst ends of the leads; electrically connecting the ball grid arraypackage and the leads of the interposer such that each of the set ofsolder balls contacts at least a portion of the first end of one of theleads and at least a portion of one of the set of pads; removing theball grid array package and the interposer from the assembly tool;orienting the second end of the leads to align with contacts on the PWB;and electrically connecting the second end of the leads to the contactson the PWB thereby establishing an electrical connection between theball grid array package and the PWB, the leads defining a space betweenthe PWB and the substrate of the interposer.